1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com hv574 features hvcmos ? technology 5.0v cms logic output voltage up to 80v low power level shifting 100mhz equivalent data rate using four dynamic shift registers latched data outputs foreward and reverse shifting options (dir pin) diode to vpp allows ef?cient power recovery outputs may be hot switched hi-rel processing available ? ? ? ? ? ? ? ? ? ? functional block diagram 100mhz, 80-channel serial to parallel converter with push-pull outputs general description the hv574 is a low-voltage serial to high-voltage parallel con- verter with push-pull outputs. this device has been designed for use as a driver for printer applications. it can also be used in any application requiring multiple output high-voltage current sour- cing and sinking capability such as driving plasma panels, vac- uum ?uorescent displays, or large matrix lcd displays. the device has 4 parallel 20-bit dynamic shift registers, permitting data rates 4x the speed of one (they are clocked together). there are 80 static latches and control logic to perform the polarity select and blanking of the outputs. hv out 1 is connected to the ?rst stage of the ?rst shift register through the polarity and blanking logic. data is shifted through the shift registers on the logic low to high transition of the clock. the dir pin causes ccw shifting when connected to gnd, and cw shifting when connected to vdd. a data output buffer is provided for cascading devices. this output re?ects the current status of the last bit of the shift register (hv out 80). operation of the shift register is not affected by the le (latch enable), bl (blanking), or the pol (polarity) inputs. transfer of data from the shift registers to the latches occurs when the le (latch enable) input is high. the data in the latches is stored when le is low. hv out 21 hv out 40 hv out 1 hv out 20 pol vpp bl le d in a d out a d in b d out b dir clk 20-bit shift register 20-bit shift register gnd vd d hv out 61 hv out 80 hv out 41 hv out 60 d in c d out c d in d d out d 20-bit shift register 20-bit shift register
2 hv574 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com ordering information device package options 100-lead pqfp 20.00x14.00mm body 3.40mm height (max) 0.65mm pitch hv574 HV574PG-G -g indicates package is rohs compliant (green) absolute maximum ratings parameter value supply voltage, v dd -0.5v to +7.5v output voltage, v pp -0.5v to +90v logic input levels -0.3v to v dd +0.3v ground current 1 1.5a continuous total power dissipation 2 1200mw operating temperature range -40c to +85c storage temperature range -65c to +150c lead temperature 3 260c absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these conditions is not implied. continuous operation of the device at the absolute rating level may affect device reliability. all voltages are referenced to device ground. notes: limited by the total dissipated in the package. for operation above 25c ambient derate linearly to 85 o c at 20mw/c. 1.6mm from case for 10 seconds. 1. 2. 3. recommended operating conditions sym parameter min max units v dd logic supply voltage 4.5 5.5 v v pp output voltage 12 80 v v ih high-level input voltage v dd -0.5v - v v il low-level input voltage 0 0.5 v f clk clock frequency per register 0.001 25 mhz t a operating free-air temperature -40 +85 c notes: power-up sequence should be the following: 1. apply ground 2. apply v dd 3. set all inputs (data, clk, enable etc.) to a known state 4. apply v pp the v pp should not drop below v dd or ?oat during operation. power-down sequence should be the reverse of the above. pin con?guration product marking 100-lead pqfp (pg) 100-lead pqfp (pg) (top view) 100 1 hv574pg l l l l l l l l l l y y w w cccccccc aaa l = lot number yy = year sealed ww = week sealed c = country of origin a = assembler id = green packaging
3 hv574 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com dc electrical characteristics (over recommended operating conditions unless otherwise noted) sym parameter min max units conditions i dd v dd supply current - 30 ma v dd = v dd max, f clk = 25mhz i pp quiescent v pp supply current - 100 a outputs high - 100 a outputs low i ddq quiescent v dd supply current - 100 a all v in = v dd v oh high-level output hv out v pp -9.0 - v i o = -30ma, v pp = +80v data out v dd -0.5 - v i o = -100 a v ol low-level output hv out - 3.75 v i o = +15ma, v dd = +5.0v data out - 0.5 v i o = +100 a i ih high-level logic input current - 1.0 a v ih = v dd i il low-level logic input current - -1.0 a v il = 0v ac electrical characteristics (t a = 85c max. logic signal inputs and data inputs have t r , t f 5.0ns [10% and 90% points]) sym parameter min max units conditions f clk clock frequency 0.001 25 mhz v dd = 4.5v, t j = 25 o c 0.001 20 v dd = 4.5v, t j = 125 o c t wl , t wh clock width high or low 20 - ns --- t su data set-up time before clock rises 0 - ns --- t h data hold time after clock rises 15 - ns --- t on , t off time from latch enable to hv out - 500 ns c l = 15pf t dhl delay time clock to data high to low - 38 ns c l = 15pf, v dd = 5.0v t dlh delay time clock to data low to high - 38 ns c l = 15pf, v dd = 5.0v t dle * delay time clock to le low to high 25 - ns --- t wle le pulse width 25 - ns --- t sle le set-up time before clock rises 0 - ns --- t r, t f output rise/fall time - 1.0 s c l = 600pf, hv out from 0 - 60v * t dle is not required but is recommended to produce stable hv outputs and thus minimize power dissipation and current spikes (allows internal sr output to stabilize).
4 hv574 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com input and output equivalent circuits switching waveforms v dd input gnd v pp gnd hv ou t logic inputs gnd data ou t logic data output high voltage output s v dd latch enable hv ou t w/ s/r lo w data valid data valid 50% d ata inpu t cloc k d ata out 50% 50% 50 % t su t h t wl t wh 50 % t dlh t dh l 50 % t wle t dle t sle 50 % 50 % t on 10 % hv ou t w/ s/r high 90 % 90 % 10 % t off t f t r v ih v il v ih v il v oh v ol v oh v ol v ih v ol v oh v ol v oh v ol 50 %
5 hv574 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com function table function inputs outputs data clk le bl pol dir shift reg hv outputs data out all o/p high x x x l l x - h - all o/p low x x x l h x - l - o/p normal x x x h h x - no inversion - o/p inverted x x x h l x - inversion - data falls through (latches transparent) l h h h x l l - h h h h x h h - l h h l x l h - h h h l x h l - data stored/ latches loaded x x l h h x * stored data - x x l h l x * inversion of stored data - i/o relation d in x h h h h q n q n+1 new h or l d out x d in x l h h h q n q n+1 previous h or l d out x d out x l h h l q n q n-1 previous h or l d in x d out x h h h l q n q n-1 new h or l d in x note: * = dependent on previous stages state. see pin con?guration for din and dout pin designation for cw and ccw shift.
6 hv574 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com pin function pin # function 1 hv out 30 2 hv out 29 3 hv out 28 4 hv out 27 5 hv out 26 6 hv out 25 7 hv out 24 8 hv out 23 9 hv out 22 10 hv out 21 11 hv out 20 12 hv out 19 13 hv out 18 14 hv out 17 15 hv out 16 16 hv out 15 17 hv out 14 18 hv out 13 19 hv out 12 20 hv out 11 21 hv out 10 22 hv out 9 23 hv out 8 24 hv out 7 25 hv out 6 pin # function 26 hv out 5 27 hv out 4 28 hv out 3 29 hv out 2 30 hv out 1 31 nc 32 vpp 33 hvgnd 34 d in a 35 d in b 36 d in c 37 d in d 38 vdd 39 pol 40 le 41 clk 42 dir 43 bl 44 gnd 45 d out d 46 d out c 47 d out b 48 d out a 49 hvgnd 50 vpp pin # function 51 hv out 80 52 hv out 79 53 hv out 78 54 hv out 77 55 hv out 76 56 hv out 75 57 hv out 74 58 hv out 73 59 hv out 72 60 hv out 71 61 hv out 70 62 hv out 69 63 hv out 68 64 hv out 67 65 hv out 66 66 hv out 65 67 hv out 64 68 hv out 63 69 hv out 62 70 hv out 61 71 hv out 60 72 hv out 59 73 hv out 58 74 hv out 57 75 hv out 56 pin # function 76 hv out 55 77 hv out 54 78 hv out 53 79 hv out 52 80 hv out 51 81 hv out 50 82 hv out 49 83 hv out 48 84 hv out 47 85 hv out 46 86 hv out 45 87 hv out 44 88 hv out 43 89 hv out 42 90 hv out 41 91 hv out 40 92 hv out 39 93 hv out 38 94 hv out 37 95 hv out 36 96 hv out 35 97 hv out 34 98 hv out 33 99 hv out 32 100 hv out 31
supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such appl ications unless it receives an adequate product liability indemnification insurance agreement. supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. no responsibility is assumed for possible omissions and inaccuracies. circuitry and specifications are subject to change without notice. for the latest product specifications refer to the supertex inc. website: http//www .supertex.com . ?2008 all rights reserved. unauthorized use or reproduction is prohibited . 1235 bordeaux drive, sunnyvale, ca 9408 9 te l: 408-222-8888 www .supertex.com 7 hv574 (the package drawing(s) in this data sheet may not re?ect the most current speci?cations. for the latest package outline information go to http://www.supertex.com/packaging.htm l .) doc.# dsfp-hv574 a091908 symbol a a1 a2 b d d1 e e1 e l l1 l2 1 dimension (mm) min 2.80* 0.25 2.55 0.22 23.65* 19.80* 17.65* 13.80* 0.65 bsc 0.73 1.95 ref 0.25 bsc 0 5 o nom - - 2.80 - 23.90 20.00 17.90 14.00 0.88 3.5 o - max 3.40 0.50* 3.05 0.38 24.15* 20.20* 18.15* 14.20* 1.03 7 o 16 o jedec registration mo-112, variation cc-1, issue b, sept.1995. * this dimension is not speci?ed in the original jedec drawing. the value listed is for reference only. drawings not to scale. supertex doc. #: dspd-100pqfppg, version a090608. note: a pin 1 identi?er must be located in the index area indicated. the pin 1 identi?er can be: a molded mark/identi?er; an embedded metal marker; or a printed indicator. 1. 1 100 to p v iew seating plane gauge plane l l1 l2 vi ew b vi ew b 1 b e side v iew a2 a a1 e e1 d d1 seating plane note 1 (index area d1/4 x e1/4 ) 100-lead pqfp package outline (pg) 20.00x14.00mm body, 3.40mm height (max), 0.65mm pitch, 3.90mm footprint
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